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Low-Power CMOS VLSI Circuit Design

ISBN: 978-0-471-11488-8
376 pages
February 2000
Low-Power CMOS VLSI Circuit Design (047111488X) cover image


A comprehensive look at the rapidly growing field of low-power VLSI design

Low-power VLSI circuit design is a dynamic research area driven by the growing reliance on battery-powered portable computing and wireless communications products. In addition, it has become critical to the continued progress of high-performance and reliable microelectronic systems. This self-contained volume clearly introduces each topic, incorporates dozens of illustrations, and concludes chapters with summaries and references. VLSI circuit and CAD engineers as well as researchers in universities and industry will find ample information on tools and techniques for design and optimization of low-power electronic systems. Topics include:
* Fundamentals of power dissipation in microelectronic devices
* Estimation of power dissipation due to switching, short circuit, subthreshold leakage, and diode leakage currents
* Design and test of low-voltage CMOS circuits
* Power-conscious logic and high-level synthesis
* Low-power static RAM architecture
* Energy recovery techniques
* Software power estimation and optimization
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Table of Contents

Low-Power CMOS VLSI Design.

Physics of Power Dissipation in CMOS FET Devices.

Power Estimation.

Synthesis for Low Power.

Design and Test of Low-Voltage CMOS Circuits.

Low-Power Static Ram Architectures.

Low-Energy Computing Using Energy Recovery Techniques.

Software Design for Low Power.

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Author Information

KAUSHIK ROY is a professor in the School of Electrical and Computer Engineering at Purdue University, West Lafayette, Indiana.

SHARAT C. PRASAD is a system architecture (hardware) engineer with Cisco Systems.
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"This is a highly recommended book for all academic engineering libraries." (E-Streams, Vol. 4, No. 8, August 2001)
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