Circuit Theory & Design / VLSI / ULSI
 Design Through Verilog HDL
ISBN: 978-0-471-44148-9
Hardcover
472 pages
November 2003, Wiley-IEEE Press
US $132.00
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T. R. PADMANABHAN, PhD, is Dean-Engineering, Amrita Institute of Technology, Amrita Vishwa Vidyapeetham, (Amrita University), Ettimadai (PO), Coimbatore, India. He is a Senior Member of IEEE as well as a Fellow of both India’s IE and IETE.
B. BALA TRIPURA SUNDARI is a Senior Lecturer in the ECE Department of the Amrita Institute of Technology. She is a senior faculty member in the microelectronics center at the institute. She is a member of India’s IETE and ISTE.
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