 Built In Test for VLSI: Pseudorandom Techniques
ISBN: 978-0-471-62463-9
Hardcover
368 pages
October 1987
US $198.00
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Digital Testing and the Need for Testable Design.
Principles of Testable Design.
Pseudorandom Sequence Generators.
Test Response Compression Techniques.
Shift-Register Polynomial Division.
Special-Purpose Shift-Register Circuits.
Random Pattern Built-In Test.
Built-In Test Structures.
Limitations and Other Concerns of Random Pattern Testing.
Test System Requirements for Built-In Test.
Appendix.
References.
Index.
Principles of Testable Design.
Pseudorandom Sequence Generators.
Test Response Compression Techniques.
Shift-Register Polynomial Division.
Special-Purpose Shift-Register Circuits.
Random Pattern Built-In Test.
Built-In Test Structures.
Limitations and Other Concerns of Random Pattern Testing.
Test System Requirements for Built-In Test.
Appendix.
References.
Index.
