INTRODUCTION AND TUTORIAL.

Synthesis Techniques (V. Kroupa).

DIRECT DIGITAL SINGLE-FREQUENCY SYNTHESIZERS.

A Frequency Synthesizer for 10/2π kHz (G. Small).

Approximating Frequency Synthesizers (V. Kroupa).

WIDE-RANGE DIRECT DIGITAL FREQUENCY SYNTHESIZERS.

A Digital Frequency Synthesizer (J. Tierney, et al.).

CMOS/SOS Frequency Synthesizer LSI Circuit for Spread Spectrum Communications (D. Sunderland, et al.).

High-Speed Direct Frequency Synthesizer (P. Saul and D. Taylor).

Single Chip 500 MHz Function Generator (P. Saul, et al.).

Low-Latency, High-Speed Numerically Controlled Oscillator Using Progression-of-States Technique (M. Thompson).

SPURIOUS SIGNALS IN DIRECT DIGITAL FREQUENCY SYNTHESIZERS.

Spectra of Pulse Rate Frequency Synthesizers (V. Kroupa).

Noise Spectra of Digital Sine-Generators Using the Table-Lookup Method (S. Mehrgardt).

An Analysis of the Output Spectrum of Direct Digital Frequency Synthesizers in the Presence of Phase-Accumulator Truncation (H. Nicholas III and H. Samueli).

The Optimization of Direct Digital Frequency Synthesizer Performance in the Presence of Finite Word Length Effects (H. Nicholas III, et al.).

Methods of Mapping From Phase to Sine Amplitude in Direct Digital Synthesis (J. Vankka).

A 150-MHz Direct Digital Frequency Synthesizer in 1.25-μm CMOS with —90-dBc Spurious Performance (H. Nicholas III and H. Samueli).

An Exact Spectral Analysis of a Number Controlled Oscillator Based Synthesizer (J. Garvey and D. Babitch).

REDUCTION OF SPURIOUS SIGNALS IN DIRECT DIGITAL FREQUENCY SYNTHESIZERS.

Spurious Suppression in Direct Digital Synthesizers (C. Wheatley & D. Phillips).

A Low-Frequency, High Resolution Digital Synthesizer (R. Giffard and L. Cutler).

A Spurious Reduction Technique for High-Speed Direct Digital Synthesizers (L. Kushner and M. Ainsworth).

A Direct-Digital Synthesizer with Improved Spectral Performance (P. O'Leary and F. Maloberti).

Spur-Reduced Digital Sinusoid Synthesis (M. Flanagan & G. Zimmerman).

Spectral Properties of DDFS: Computer Simulations and Experimental Verifications (V. Kroupa).

COMBINATION OF DDFS WITH PHASE LOCKED LOOPES (PLLs).

Principles of Phase Locked Loops (PLL) (V. Kroupa).

Low-Noise Microwave-Frequency Synthesizers: Design Principles (V. Kroupa).

A J-Band Spread-Spectrum Synthesizer Using a Combination of DDS and Phaselock Techniques (M. Harris).

Principles of Fractional-N Frequency Synthesizers (V. Kroupa).

A Multiple Modulator Fractional Divider (B. Miller and R. Conley).

A Fast-Settling GaAs-Enhanced Frequency Synthesizer (J. Naber, et al.).

PHASE AND BACKGROUND NOISE IN DDFS.

Introduction to the Noise Properties of Frequency Sources (V. Kroupa).

Close-to-the-Carrier Noise in DDFS (V. Kroupa).

Phase Noise in Direct Digital Synthesizers (E. Mattison and L. Coyle).

A Direct Digital Synthesizer with 100-MHz Output Capability (P. Saul and M. Mudd).

An Analysis Methodology to Identify Dominant Noise Sources in D/A and A/D Converters (J. Connelly and K. Taylor).

DIGITAL-TO-ANALOG CONVERTERS.

Digital-to-Analog Converters (V. Kroupa).

A Monolithic 10-b Digital-to-Analog Convertor Using Ion Implantation (G. Kelson, et al.).

An Inherently Monotonic 12 Bit DAC (J. Schoeff).

An 8-Bit, 5 ns Monolithic D/A Converter Subsystem (P. Saul, et al.).

A 500-MHz 8-Bit D/A Converter (K. Maio, et al.).

An 8-Bit 2-ns Monolithic DAC (T. Kamoto, et al.).

STATE OF THE ART AND SOME APPLICATIONS.

A High Purity, High Speed Direct Digital Synthesizer (G. Kent and N. Sheng).

A 200 MHz Quadrature Digital Synthesizer/Mixer in 0.8 μm CMOS (L. Tan and H. Samueli).

An 800-MHz Quadrature Digital Synthesizer with ECL-Compatible Output Drivers in 0.8 μm CMOS (L. Tan, et al.).

A Dual Frequency Synthesis Scheme for a High C-Field Cesium Resonator (E. Rubiola, et al.).

NEW IDEAS FOR THE DDFS DESIGN.

A 700-MHz 24-b Pipelined Accumulator in 1.2-μm CMOS for Applications as a Numerically Controlled Oscillator (F. Lu, et al.).

An Integrated GaAs 1.25 GHz Clock Frequency FM-CW Direct Digital Synthesizer (N. Caglio, et al.).

The Composite DDS—A New Direct Digital Synthesizer Architecture (L. Kushner).

A Narrow Band High-Resolution Synthesizer Using a Direct Digital Synthesizer Followed by Repeated Dividing and Mixing (R. Karlquist).

A 3 to 30 MHz High-Resolution Synthesizer Consisting of a DDS, Divide-and-Mix Modules, and a M/N Synthesizer (R. Karlquist).

A New Architecture for a Sinewave Output DDS With a High Spectral Purity (L. Presti, et al.).

MATHEMATICAL BACKGROUND.

Quasiperiodic Omission of Pulses (V. Kroupa).

Useful Computer Programs for Investigations of Spurious Signals in DDFS (V. Kroupa).

Author Index.

Subject Index.

About the Editor.