Direct Digital Frequency SynthesizersISBN: 9780780334380
396 pages
November 1998, WileyIEEE Press

Compiled for practicing engineers who do not have the prerequisite of a specialist's knowledge in Direct Digital Frequency Synthesizers (DDS), this collection of 40 important reprinted papers and 9 neverbefore published contributions presents a comprehensive introduction to DDS properties and a clear understanding of actual devices. The information in this volume can lead to easier computer simulations and improved designs.
Featured topics include:
 Discussion of principles and state of the art of widerange DDS
 Investigation of spurious signals in DDS
 Combination of DDS with Phase Lock Loops (PLL)
 Examination of phase and background 'noise' in DDS
 Introduction to Digital to Analog Conversion (DAC)
 Analysis of mathematics of quasiperiodic omission of pulses
DDFS can also serve as a textbook for students seeking essential background theory.
Part I Introduction and Tutorial.
Synthesis Technique (V. F. Kroupa).
Part II Direct Digital SingleFrequency Synthesizers.
A Frequency Synthesizer for 10/27T kHz (G. W. Small, IEEE Transactions on Instrumentation and Measurement, March 1973).
Approximating Frequency Synthesizers (V. F. Kroupa, IEEE Transactions on Instrumentation and Measurement, December 1974).
Part III WideRange Direct Digital Frequency Synthesizers.
A Digital Frequency Synthesizer (J. Tierney, C. M. Radre, and B. Gold, IEEE Transactions on Audio and Electroacoustics, March 1971).
CMOS/SOS Frequency Synthesizer LSI Circuit for Spread Spectrum Communications (D. A. Sunderland, R. A. Strauch, S. S. Wharfield, H. T. Peterson, and C. R. Cole, IEEE Journal of SolidState Circuits, August 1984).
A HighSpeed Direct Frequency Synthesizer (P. H. Saul and D. G. Taylor, IEEE Journal of SolidState Circuits, February 1990).
Single Chip 500 MHz Function Generator (P. H. Saul, W. Barber, D. G. Taylor, and T. Ward, IEE ProceedingsG, April 1991).
LowLatency, HighSpeed Numerically Controlled Oscillator Using ProgressionofStates Technique (M. Thompson, IEEE Journal of SolidState Circuits, January 1992).
Part IV Spurious Signals in Direct Digital Frequency Synthesizers.
Spectra of Pulse Rate Frequency Synthesizers (V. F. Kroupa, Proceedings of the IEEE, December 1979).
Noise Spectra of Digital SineGenerators Using the TableLookup Method (S. Mehrgardt, IEEE Transactions on Acoustics, Speech, and Signal Processing, August 1983).
An Analysis of the Output Spectrum of Direct Digital Frequency Synthesizers in the Presence of PhaseAccumulator Truncation (H. T. Nicholas III, and H. Samueli, Proceedings of the 41st Annual Frequency Control Symposium, 1987).
The Optimization of Direct Digital Frequency Synthesizer Performance in the Presence of Finite Word Length Effects (H. T. Nicholas III, H. Samueli, and B. Kim, Proceedings of the 42nd Annual Frequency Control Symposium, 1988).
Methods of Mapping From Phase to Sine Amplitude in Direct Digital Synthesis (J. Vankka, IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control, March 1997).
A 150MHz Direct Digital Frequency Synthesizer in 1.25j/,m CMOS with 90dBc Spurious Performance (H. T. Nicholas III, and H. Samueli, IEEE Journal of SolidState Circuits, December 1991).
An Exact Spectral Analysis of a Number Controlled Oscillator Based Synthesizer (J. F. Garvey and D. Babitch, Proceedings of the 44th Annual Frequency Control Symposium, 1990).
Part V Reduction of Spurious Signals in Direct Digital Frequency Synthesizers.
Spurious Suppression in Direct Digital Synthesizers (C. E. Wheatley and D. E. Phillips, Proceedings of the 35th Annual Frequency Control Symposium, 1981).
A LowFrequency, High Resolution Digital Synthesizer (R. P. Giffard and L. S. Cutler, Proceedings—IEEE International Frequency Control Symposium, 1997).
A Spurious Reduction Technique for HighSpeed Direct Digital Synthesizers (L. J. Kushner and M. T. Ainsworth, Proceedings of the IEEE International Frequency Control Symposium, 1996).
A DirectDigital Synthesizer with Improved Spectral Performance (P. O'Leary and F. Maloberti, IEEE Transactions on Communications, July 1991).
SpurReduced Digital Sinusoid Synthesis (M. J. Flanagan and G. A. Zimmerman, IEEE Transactions on Communications, July 1995).
Spectral Properties of DDFS: Computer Simulations and Experimental Verifications (V. F. Kroupa, Adaptation: 1993 and 1994 IEEE International Frequency Control Symposia and the 8th European Frequency and Time Forum, March 1994).
Part VI Combination of DDFS with Phase Locked Loops (PLLs).
Principles of Phase Locked Loops (PLL) (V. F. Kroupa, A specially written paper for this volume).
LowNoise MicrowaveFrequency Synthesizers: Design Principles (V. F. Kroupa, IEE ProceedingH, December 1983).
A JBand SpreadSpectrum Synthesizer Using a Combination of DDS and Phaselock Techniques (M. V. Harris, Colloquium on "Direct Digital Frequency Synthesis," IEEE Digest No: 1991/172, November 1991).
Principles of FractionalN Frequency Synthesizers (V. F. Kroupa, A specially written paper for this volume).
A Multiple Modulator Fractional Divider (B. Miller and R. J. Conley, IEEE Transactions on Instrumentation and Measurements). June 1991.
A FastSettling GaAsEnhanced Frequency Synthesizer (J. F. Naber, H. P. Singh, W. J. Tanis, A. J. Koshar, and G. L. Segalla, IEEE Journal of SolidState Circuits, October 1992).
Part VII Phase and Background Noise in DDFS.
Introduction to the Noise Properties of Frequency Sources (V. F. Kroupa, A specially written paper for this volume).
ClosetotheCarrier Noise in DDFS (V. F. Kroupa, Based on a paper that originally appeared in the IEEE International Frequency Control Symposium, November 1996).
Phase Noise in Direct Digital Synthesizers (E. M. Mattison and L. M. Coyle, Proceedings of the 42nd Annual Frequency Control Symposium, 1988).
A Direct Digital Synthesizer with 100MHz Output Capability (P. H. Saul and M. S. J. Mudd, IEEE Journal of SolidState Circuits, June 1988).
An Analysis Methodology to Identify Dominant Noise Sources in D/A and A/D Converters (J. A. Connelly and K. P. Taylor, IEEE Transactions on Circuits and Systems, October 1991).
Part VIII DigitaltoAnalog Converters.
DigitaltoAnalog Converters (V. R Kroupa, A specially written paper for this volume).
A Monolithic 10b DigitaltoAnalog Converter Using Ion Implantation (G. Kelson, H. H. Stellrecht, and D. S. Perloff, IEEE Journal of SolidState Circuits, December 1973).
An Inherently Monotonic 12 Bit DAC (J. A. Schoeff, IEEE Journal of SolidState Circuits, December 1979).
An 8Bit, 5 ns Monolithic D/A Converter Subsystem (P. H. Saul, P. J. Ward, and A. J. Fryers, IEEE Journal of SolidState Circuits, December 1980).
A 500MHz 8Bit D/A Converter (K. Maio, S.I. Hayashi, M. Hotta, T. Watanabe, W. Ueda, and N. Yokozawa, IEEE Journal of SolidState Circuits, December 1985).
An 8Bit 2ns Monolithic DAC (T. Kamoto, Y. Akazawa, and M. Shinagawa, IEEE Journal of SolidState Circuits, February 1988).
Part IX State of the Art and Some Applications.
A High Purity, High Speed Direct Digital Synthesizer (G. W. Kent and N.H. Sheng, Proceedings of the IEEE International Frequency Control Symposium, 1993).
A 200 MHz Quadrature Digital Synthesizer/Mixer in 0.8 /xm CMOS (L. K. Tan and H. Samueli, IEEE Journal of SolidState Circuits, March 1995).
An 800MHz Quadrature Digital Synthesizer with ECLCompatible Output Drivers in 0.8 fxm CMOS (L. K. Tan, E. W. Roth, G. E. Yee, and H. Samueli, IEEE Journal of SolidState Circuits, December 1995).
A Dual Frequency Synthesis Scheme for a High CField Cesium Resonator (E. Rubiola, A. Del Casale, A. De Marchi, Proceedings of the IEEE International Frequency Control Symposium, 1993).
Part X New Ideas for the DDFS Design.
A 700MHz 24b Pipelined Accumulator in 1.2/xm CMOS for Applications as a Numerically Controlled Oscillator (F. Lu, H. Samueli, J. Yuan, and H. Svensson, IEEE Journal of SolidState Circuits, August 1993).
An Integrated GaAs 1.25 GHz Clock Frequency FMCW Direct Digital Synthesizer (N. Caglio, J.L. Degouy, D. Meignant, P. Rousseau, and B. Leroux, IEEE GaAs Symposium, October 1993).
The Composite DDSA New Direct Digital Synthesizer Architecture (L. J. Kushner, Proceedings of the IEEE International Frequency Control Symposium, 1993).
A Narrow Band HighResolution Synthesizer Using a Direct Digital Synthesizer Followed by Repeated Dividing and Mixing (R. Karlquist, Proceedings of the IEEE International Frequency Control Symposium, 1995).
A 3 to 30 MHz HighResolution Synthesizer Consisting of a DDS, DivideandMix Modules, and a M/N Synthesizer (R. Kariquist, Proceedings of the IEEE International Frequency Control Symposium, 1996).
A New Architecture for a Sinewave Output DDS With a High Spectral Purity (L. Lo Presti, G. Cardamone, A. De Marchi, and E. Rubiola, 8th European Frequency and Time Forum, March 1994).
Part XI Mathematical Background.
Quasiperiodic Omission of Pulses (V. F. Kroupa, A specially written paper for this volume).
Useful Computer Programs for Investigations of Spurious Signals in DDFS (V. F. Kroupa, A specially written paper for this volume).
Author Index.
Subject Index.
About the Editor.