Embedded SoPC Design with Nios II Processor and Verilog Examples
Explores the unique hardware programmability of FPGA-based embedded systems, using a learn-by-doing approach to introduce the concepts and techniques for embedded SoPC design with Verilog
An SoPC (system on a programmable chip) integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single FPGA (field-programmable gate array) device. In addition to the customized software, customized hardware can be developed and incorporated into the embedded system as wellallowing us to configure the soft-core processor, create tailored I/O interfaces, and develop specialized hardware accelerators for computation-intensive tasks.
Utilizing an Altera FPGA prototyping board and its Nios II soft-core processor, Embedded SoPC Design with Nios II Processor and Verilog Examples takes a "learn by doing" approach to illustrate the hardware and software design and development process by including realistic projects that can be implemented and tested on the board.
Emphasizing hardware design and integration throughout, the book is divided into four major parts:
Part I covers HDL and synthesis of custom hardware
Part II introduces the Nios II processor and provides an overview of embedded software development
Part III demonstrates the design and development of hardware and software of several complex I/O peripherals, including a PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card
Part IV provides several case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology
While designing and developing an embedded SoPC can be rewarding, the learning can be a long and winding journey. This book shows the trail ahead and guides readers through the initial steps to exploit the full potential of this emerging methodology.
1 Overview of Embedded System
PART I: BASIC DIGITAL CIRCUITS DEVELOPMENT
2 Gate-level Combinational Circuit
3 Overview of FPGA and EDA Software
4 RT-level Combinational Circuit
5 Regular Sequential Circuit
8 Selected Topics of Verilog
PART II: BASIC NOIS II SOFTWARE DEVELOPMENT
9 Nios II Processor Overview
10 NIOS II System Derivation and Low-Level Access
11 Predesigned Nios II I/O Peripherals
12 Predesigned Nios II I/O Drivers and HAL API
13 Interrupt and ISR
PART III: CUSTOM I/O PERIPHERAL DEVELOPMENT
14 Custom I/O Peripheral with P/O Cores
15 Avalon Interconnect and SOPC Component
16 SRAM and SDRAM Controllers
17 PS2 Keyboard and Mouse
18 VGA Controller
19 Audio Codec Controller
20 SD Card Controller
PART IV: HARDWARE ACCLERATOR CASE STUDIES
21 GCD Accelerator
22 Mandelbrot Set Fractal Accelerator
23 Direct Digital Frequency Synthesis
Dr. Pong P. Chu is Associate Professor in the Department of Electrical and Computer Engineering at Cleveland State University in Ohio. He has taught undergraduate- and graduate-level digital systems and computer architecture courses for more than a decade and has received instructional grants from the National Science Foundation and Cleveland State University.
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Embedded SoPC Design with Nios II Processor and Verilog Examples (US $144.00)
-and- Embedded SoPC Design with Nios II Processor and VHDL Examples (US $137.00)
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