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Resistive Switching: From Fundamentals of Nanoionic Redox Processes to Memristive Device Applications

Daniele Ielmini (Editor), Rainer Waser (Editor)
ISBN: 978-3-527-33417-9
784 pages
March 2016
Resistive Switching: From Fundamentals of Nanoionic Redox Processes to Memristive Device Applications (3527334173) cover image

Description

With its comprehensive coverage, this reference introduces readers to the wide topic of resistance switching, providing the knowledge, tools, and methods needed to understand, characterize and apply resistive switching memories.
Starting with those materials that display resistive switching behavior, the book explains the basics of resistive switching as well as switching mechanisms and models. An in-depth discussion of memory reliability is followed by chapters on memory cell structures and architectures, while a section on logic gates rounds off the text.
An invaluable self-contained book for materials scientists, electrical engineers and physicists dealing with memory research and development.
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Table of Contents

Preface XIX

List of Contributors XXI

1 Introduction to Nanoionic Elements for Information Technology 1
Rainer Waser, Daniele Ielmini, Hiro Akinaga, Hisashi Shima, H.-S. Philip Wong, Joshua J. Yang, and Simon Yu

1.1 Concept of Two-Terminal Memristive Elements 1

1.1.1 Classifications Based on Behavior, Mechanisms, and Operation Modes 1

1.1.2 Scope of the Book 6

1.1.3 History 9

1.2 Memory Applications 12

1.2.1 Performance Requirements and ParameterWindows 12

1.2.2 Device Isolation in Crossbar Arrays 16

1.2.3 3-D Technology 19

1.2.4 Memory Hierarchy 20

1.3 Logic Circuits 21

1.4 Prospects and Challenges 24

Acknowledgments 25

References 25

2 ReRAM Cells in the Framework of Two-Terminal Devices 31
E. Linn, M. Di Ventra, and Y. V. Pershin

2.1 Introduction 31

2.2 Two-Terminal Device Models 32

2.2.1 Lumped Elements 32

2.2.2 Ideal Circuit Element Approach 32

2.2.3 Dynamical Systems Approach 33

2.2.3.1 Memristive Systems 33

2.2.3.2 Memristor 34

2.2.4 Significance of the Initial Memristor and Memristive System Definitions in the Light of Physics 34

2.2.4.1 Limitations of Ideal Memristor Models 35

2.2.5 Memristive, Memcapacitive, and Meminductive Systems 35

2.2.6 ReRAM: Combination of Elements, Combination of Memory Features, and Consideration of Inherent Battery Effects 36

2.3 Fundamental Description of Electronic Devices with Memory 38

2.4 Device Engineer’s View on ReRAM Devices as Two-Terminal Elements 40

2.4.1 Modeling of Electrochemical Metallization (ECM) Devices 41

2.4.2 Modeling of Valence Change Mechanism (VCM) Devices 43

2.5 Conclusions 46

Acknowledgment 47

References 47

3 Atomic and Electronic Structure of Oxides 49
Tobias Zacherle, Peter C. Schmidt, and Manfred Martin

3.1 Introduction 49

3.2 Crystal Structures 50

3.3 Electronic Structure 54

3.3.1 From Free Atoms to the Solid State 55

3.3.2 Electrons in Crystals 58

3.3.2.1 Free Electron Model (Sommerfeld Model) 58

3.3.2.2 Band Structure Model 60

3.3.2.3 Density of States (DOS) and Partial DOS 62

3.3.2.4 Crystal Field Splitting 64

3.3.2.5 Exchange and Correlation 65

3.3.2.6 Computational Details 66

3.4 Material Classes and Characterization of the Electronic States 67

3.4.1 Metals 67

3.4.2 Semiconductors 68

3.4.3 Insulators 71

3.4.4 Point Defect States 72

3.4.5 Surface States 73

3.4.6 Amorphous States 75

3.5 Electronic Structure of Selected Oxides 76

3.5.1 Nontransition Metal Oxides 76

3.5.1.1 Al2O3 76

3.5.1.2 SrO 77

3.5.1.3 ZnO 77

3.5.2 Titanates 79

3.5.2.1 TiO 79

3.5.2.2 Ti2O3 79

3.5.2.3 TiO2 81

3.5.2.4 SrTiO3 82

3.5.3 Magnetic Insulators 82

3.5.3.1 NiO 84

3.5.3.2 MnO 85

3.5.4 MVB Metal Oxides 86

3.5.4.1 Metal–Insulator Transitions: NbO2, VO2, and V2O3 86

3.5.4.2 Tantalum Oxides TaOx 87

3.6 Ellingham Diagram for Binary Oxides 90

Acknowledgments 91

References 91

4 Defect Structure of Metal Oxides 95
Giuliano Gregori

4.1 Definition of Defects 95

4.1.1 Zero-Dimensional Defects 95

4.1.2 One-Dimensional Defects 95

4.1.3 Two-Dimensional Defects 97

4.1.4 Three-Dimensional Defects 97

4.2 General Considerations on the EquilibriumThermodynamics of Point Defects 98

4.3 Definition of Point Defects 99

4.3.1 Intrinsic Defects 99

4.3.1.1 Frenkel Defects 99

4.3.1.2 Anti-Frenkel Defects 99

4.3.1.3 Schottky Defects 100

4.3.1.4 Anti-Schottky Defects 100

4.3.1.5 Electron Band–Band Transfer 100

4.3.2 Extrinsic Defects 100

4.3.2.1 Reactions with the Environment 100

4.3.2.2 The Brouwer Diagram 101

4.3.2.3 Impurities and Dopants 102

4.4 Space-Charge Effects 103

4.4.1 Mott–Schottky Situation 104

4.4.2 Gouy–Chapman Situation 105

4.5 Case Studies 106

4.5.1 Titanium Oxide (Rutile) 106

4.5.1.1 Nominally Pure TiO2 107

4.5.1.2 Acceptor-Doped TiO2 108

4.5.1.3 Donor-Doped TiO2 108

4.5.1.4 The Role of Dislocations 109

4.5.2 Strontium Titanate 110

4.5.2.1 Acceptor-Doped SrTiO3 110

4.5.2.2 Donor-Doped SrTiO3 111

4.5.2.3 Grain Boundaries in SrTiO3 111

4.5.3 Zirconium and Hafnium Oxide 113

4.5.3.1 Zirconium Oxide 113

4.5.3.2 The Role of Grain Boundaries and Dislocations 115

4.5.3.3 Hafnium Oxide 116

4.5.4 Aluminum Oxide 116

4.5.4.1 Acceptor-Doped Alumina 117

4.5.4.2 Donor-Doped Alumina 118

4.5.5 Tantalum Oxide 119

References 121

5 Ion Transport in Metal Oxides 125
Roger A. De Souza

5.1 Introduction 125

5.2 Macroscopic Definition 126

5.2.1 Two Solutions of the Diffusion Equation 127

5.2.2 Dependence of the Diffusion Coefficient on Characteristic Thermodynamic Parameters 128

5.3 Microscopic Definition 129

5.3.1 Mechanisms of Diffusion 130

5.3.2 Diffusion Coefficients of Defects and Ions 131

5.3.3 The Activation Barrier for Migration 132

5.4 Types of Diffusion Experiments 134

5.4.1 Chemical Diffusion 135

5.4.2 Tracer Diffusion 137

5.4.3 Conductivity 139

5.5 Mass Transport along and across Extended Defects 141

5.5.1 Accelerated Transport along Extended Defects 143

5.5.2 Hindered Transport across Extended Defects 145

5.6 Case Studies 145

5.6.1 Strontium Titanate 147

5.6.2 Yttria-Stabilized Zirconia (YSZ) 150

5.6.3 Alumina 153

5.6.4 Tantalum Pentoxide 155

Acknowledgments 156

References 157

6 Electrical Transport in Transition Metal Oxides 165
Franklin J.Wong and Shriram Ramanathan

6.1 Overview 165

6.2 Structure of Transition Metal Oxides 166

6.2.1 Crystal Structures of Oxides 166

6.2.2 Bonding and Electronic Structure 167

6.3 Models of Electrical Transport 168

6.3.1 Band Transport of Carriers 168

6.3.2 Electronic Bandwidth 169

6.3.3 Small Polaron Formation 169

6.3.4 Small Polaron Transport 171

6.3.5 Thermopower (Seebeck Coefficient) 172

6.3.6 Hopping Transport via Defect States 172

6.3.7 Bad Metallic Behavior 174

6.4 Band Insulators 175

6.4.1 SnO2: 3d10 System 175

6.4.2 TiO2: 3d0 System 176

6.5 Half-Filled Mott Insulators 177

6.5.1 Correlations and the Hubbard U 177

6.5.2 MnO: 3d5 System 179

6.5.3 NiO: 3d8 System 179

6.5.4 α-Fe2O3: 3d5 System 182

6.5.5 Summary 184

6.6 Temperature-Induced Metal–Insulator Transitions in Oxides 184

6.6.1 Orbitals and Metal–Insulator Transitions 184

6.6.2 VO2: 3d1 System 186

6.6.3 Ti2O3: 3d1 System 187

6.6.4 V2O3: 3d2 System 189

6.6.5 Fe3O4: Mixed-Valent System 190

6.6.6 Limitations 191

6.6.7 Summary 192

References 193

7 Quantum Point Contact Conduction 197
Jan van Ruitenbeek, Monica Morales Masis, and Enrique Miranda

7.1 Introduction 197

7.2 Conductance Quantization in Metallic Nanowires 197

7.3 Conductance Quantization in Electrochemical Metallization Cells 204

7.3.1 Current–Voltage Characteristics and Definition of Initial Device Resistance 206

7.3.2 Stepwise Conductance Changes in Metallic Filaments 207

7.4 Filamentary Conduction and Quantization Effects in Binary Oxides 210

7.5 Conclusion and Outlook 218

References 218

8 Dielectric Breakdown Processes 225
Jordi Su˜né, Nagarajan Raghavan, and K. L. Pey

8.1 Introduction 225

8.2 Basics of Dielectric Breakdown 226

8.3 Physics of Defect Generation 231

8.3.1 Thermochemical Model of Defect Generation 232

8.3.2 Anode Hydrogen Release Model of Defect Generation 233

8.4 Breakdown and Oxide Failure Statistics 235

8.5 Implications of Breakdown Statistics for ReRAM 237

8.6 Chemistry of the Breakdown Path and Inference on Filament Formation 241

8.7 Summary and Conclusions 246

References 247

9 Physics and Chemistry of Nanoionic Cells 253
Ilia Valov and Rainer Waser

9.1 Introduction 253

9.2 Basic Thermodynamics and Heterogeneous Equilibria 254

9.3 Phase Boundaries and Boundary Layers 258

9.3.1 Driving Force for the Formation of Space-Charge Layers 258

9.3.2 Enrichment andWeak Depletion Layers 260

9.3.3 Strong Depletion Layers 261

9.3.4 Nanosize Effects on Space-Charge Regions 263

9.3.5 Nanosize Effects due to Surface Curvature 265

9.3.6 Formation of New Phases at Phase Boundaries 265

9.4 Nucleation and Growth 266

9.4.1 Macroscopic View 266

9.4.2 Atomistic Theory 267

9.5 Electromotive Force 269

9.5.1 Electrochemical Cells of Different Half Cells 269

9.5.2 Emf Caused by Surface Curvature Effects 270

9.5.3 Emf Caused by Concentration Differences 271

9.5.4 Diffusion Potentials 273

9.6 General Transport Processes and Chemical Reactions 274

9.7 Solid-State Reactions 275

9.8 Electrochemical (Electrode) Reactions 280

9.8.1 Charge-Transfer Process Limitations 280

9.8.2 Diffusion-Limited Electrochemical Processes 282

9.9 Stoichiometry Polarization 283

Summary 285

Acknowledgments 286

References 286

10 Electroforming Processes in Metal Oxide Resistive-Switching Cells 289
Doo Seok Jeong, Byung Joon Choi, and Cheol Seong Hwang

10.1 Introduction 289

10.1.1 Forming Methods 290

10.1.2 Dependence of the Bipolar Switching Behavior on the Forming Conditions 291

10.1.3 Factors Influencing Forming Behavior 294

10.1.4 Forming in Bipolar and Unipolar Switching 295

10.1.5 Phenomenological Understanding of Forming 297

10.2 Forming Mechanisms 297

10.2.1 Early Suggested Forming Mechanisms 298

10.2.2 Conducting Filament Formation 298

10.2.3 Redox Reactions and Ion or Ionic Defect Migration during Forming 300

10.2.4 Point Defect Introduction 302

10.2.5 Point Defect Dynamics during the Forming Process 304

10.2.6 Microscopic Evidence for CF Formation during Forming 308

10.3 Technical Issues Related to Forming 310

10.3.1 Problems of Current Overshoot Forming 310

10.3.2 Nonuniform Forming Voltage Distribution 311

10.3.3 Forming-Free Resistive Switching 311

10.4 Summary and Outlook 312

Acknowledgments 313

References 313

11 Universal Switching Behavior 317
Daniele Ielmini and StephanMenzel

11.1 General Properties of ReRAMs and Their Universal Behavior 317

11.2 Explaining the Universal Switching of ReRAM 320

11.3 Variable-Diameter Model 321

11.4 Variable-Gap Model 329

11.5 Coexistence of Variable-Gap/Variable-Diameter States 334

11.6 Summary 337

Acknowledgment 337

References 338

12 Quasistatic and PulseMeasuring Techniques 341
Antonio Torrezan, Gilberto Medeiros-Ribeiro, and Stephan Tiedke

12.1 Brief Introduction to Electronic Transport Testing of ReRAM 341

12.2 Quasistatic Measurement of Current–Voltage Characteristics 342

12.2.1 Dependence of Switching Parameters on Sweep Rate 345

12.3 Current Compliance and Overshoot Effects 346

12.4 Pulsed Measurements for the Study of Switching Dynamics 350

12.4.1 Experimental Setup and Results for Nanosecond Switching with Real-Time Monitoring of Device Dynamics 353

12.4.2 Experimental Setup and Results for Subnanosecond Switching with Real-Time Monitoring of Device Dynamics 354

12.5 Conclusions 358

Acknowledgment 359

References 359

13 Unipolar Resistive-Switching Mechanisms 363
Ludovic Goux and Sabina Spiga

13.1 Introduction to Unipolar Resistive Switching 363

13.2 Principle of Unipolar Switching 364

13.2.1 Basic Operation of Unipolar Memory Cells 364

13.2.2 Structure of Unipolar Memory Arrays 365

13.2.3 Experimental Evidences of Filamentary-Switching Mechanism 366

13.2.4 Typical Materials Used in Unipolar-Switching Cells 367

13.3 Unipolar-Switching Mechanisms in Model System Pt/NiO/Pt 368

13.3.1 Microscopic Origin of Switching in NiO Layers 368

13.3.1.1 Defect Chemistry 368

13.3.1.2 Microscopic Mechanism of the Switching 371

13.3.2 Physics-Based Electrical Models 372

13.3.2.1 Modeling of the Reset Switching 372

13.3.2.2 Modeling of the Set Switching 373

13.3.3 Model Implications on the Device Level 375

13.3.3.1 CF Size and RLRS Scaling with IC 375

13.3.3.2 Ireset Scaling with CF Size Scaling 376

13.3.3.3 Switching Speed 377

13.4 Influence of Oxide and Electrode Materials on Unipolar-Switching Mechanisms 379

13.4.1 Influence of the Oxide Material 380

13.4.1.1 The Specific Case of TiO2 380

13.4.1.2 Influence of the Oxide Microstructure 380

13.4.1.3 Random Circuit Breaker Model 381

13.4.1.4 Coexistence of Bipolar and Unipolar Switching 382

13.4.1.5 Switching Variability and Endurance 383

13.4.2 Impacts and Roles of Electrodes 384

13.4.2.1 Anode-Mediated Reset Operation 384

13.4.2.2 Selection Criteria of Electrode Materials 385

13.5 Conclusion 386

References 387

14 Modeling the VCM- and ECM-Type Switching Kinetics 395
Stephan Menzel and Ji-Hyun Hur

14.1 Introduction 395

14.2 Microscopic Switching Mechanism of VCM Cells 395

14.3 Microscopic Switching Mechanism of ECM Cells 397

14.4 Classification of Simulation Approaches 398

14.4.1 Ab initio and Molecular Dynamics Simulation Models 398

14.4.2 Kinetic Monte Carlo Simulation Models 398

14.4.3 Continuum Models 398

14.4.4 Compact Models 399

14.5 General Considerations of the Physical Origin of the Nonlinear Switching Kinetics 399

14.6 Modeling of VCM Cells 402

14.6.1 Ab initio Models and MD Models 402

14.6.1.1 HRS and LRS State Modeling 402

14.6.1.2 Electron Transfer 404

14.6.1.3 Phase Transformations and Nucleation 405

14.6.1.4 Calculation of Migration Barriers 406

14.6.2 Kinetic Monte Carlo Modeling 407

14.6.3 Continuum Modeling 410

14.6.4 Compact Modeling 417

14.7 Modeling of ECM Cells 422

14.7.1 Ab initio Models and MD Models 422

14.7.2 KMC Modeling 423

14.7.3 Continuum Modeling 426

14.7.4 Compact Modeling 428

14.8 Summary and Outlook 431

Acknowledgment 433

References 433

15 Valence Change Observed by Nanospectroscopy and Spectromicroscopy 437
Christian Lenser, Regina Dittmann, and John Paul Strachan

15.1 Introduction 437

15.2 Methods and Techniques 439

15.3 Interface Phenomena 442

15.3.1 Reactive Metal Layers on Insulating Oxides 442

15.3.2 Formation of a Blocking Layer on Conducting Oxides 443

15.3.3 Electrically Induced Redox Reactions at the Interface 444

15.4 Localized Redox Reactions in Transition Metal Oxides 446

15.4.1 Single Crystalline Model System – Doped SrTiO3 446

15.4.2 Localized Structural and Compositional Changes in TiO2 448

15.4.3 Compositional Changes in Ta2O5 and HfO2 450

15.5 Conclusions 453

Acknowledgment 453

References 453

16 Interface-Type Switching 457
Akihito Sawa and Rene Meyer

16.1 Introduction 457

16.2 Metal/Conducting Oxide Interfaces: I–V Characteristics and Fundamentals 459

16.2.1 Schottky-Like Metal/Conducting Oxide Interfaces 459

16.2.2 Electronic Properties of Donor-Doped SrTiO3 460

16.2.3 Electronic Properties of Mixed-Valent Manganites 461

16.3 Resistive Switching of Metal/Donor-Doped SrTiO3 Cells 463

16.4 Resistive Switching of p-Type PCMO Cells 465

16.5 Resistive Switching in the Presence of a Tunnel Barrier 469

16.5.1 Device Structure and Materials 469

16.5.2 Electrical Characteristics 470

16.5.3 Mechanism and Modeling 472

16.5.4 Passive Cross-Point Arrays 473

16.6 Ferroelectric Resistive Switching 475

16.6.1 Classification of Ferroelectric Resistive Switching 475

16.6.2 Ferroelectric Resistive-Switching Diode 475

16.7 Summary 479

Acknowledgment 480

References 480

17 Electrochemical Metallization Memories 483
Michael N. Kozicki, MariaMitkova, and Ilia Valov

17.1 Introduction 483

17.2 Metal Ion Conductors 484

17.2.1 Materials 484

17.2.2 Ion Transport 490

17.3 Electrochemistry of CBRAM (ECM) Cells 492

17.3.1 Fundamental Processes 492

17.3.2 Filament Growth and Dissolution 495

17.3.3 Filament Morphology 500

17.4 Devices 503

17.4.1 Device Operation 503

17.4.2 Memory Arrays 506

17.5 Technological Challenges and Future Directions 508

Acknowledgment 509

References 510

18 Atomic Switches 515
Kazuya Terabe, Tohru Tsuruoka, Tsuyoshi Hasegawa, Alpana Nayak, Takeo Ohno, Tomonobu Nakayama, and Masakazu Aono

18.1 Introduction 515

18.1.1 Brief History of the Development of the Atomic Switch 516

18.1.2 BasicWorking Principle of the Atomic Switch 517

18.2 Gap-Type Atomic Switches 519

18.2.1 Switching Time 519

18.2.2 Electrochemical Process 521

18.2.3 Cross-Bar Structure 523

18.2.4 Quantized Conductance 524

18.2.5 Logic-Gate Operation 526

18.2.6 Synaptic Behavior 527

18.2.7 Photo-Assisted Switch 528

18.3 Gapless-Type Atomic Switches 529

18.3.1 Sulfide-Based Switch 529

18.3.2 Oxide-Based Switch 530

18.3.3 Effect of Moisture 533

18.3.4 Switching Time 534

18.3.5 Quantized Conductance and Synaptic Behavior 535

18.3.6 Polymer-Based Switch 536

18.4 Three-Terminal Atomic Switches 537

18.4.1 Filament-Growth-Controlled Type 537

18.4.2 Nucleation-Controlled Type 539

18.5 Summary 541

References 542

19 Scaling Limits of Nanoionic Devices 547
Victor Zhirnov and Gurtej Sandhu

19.1 Introduction 547

19.2 Basic Operations of ICT Devices 547

19.3 Minimal Nanoionic ICT 549

19.3.1 Switching Mechanisms and the Material Systems 549

19.3.2 Atomic Filament: Classical and Quantum Resistance 551

19.3.2.1 Classical Resistance 551

19.3.2.2 Quantum Resistance 552

19.3.2.3 Conductance in the Presence of Barriers 553

19.3.2.4 Barriers in Atomic Gaps: Nonrectangular Barrier 555

19.3.2.5 Transmission through Atomic Gaps 555

19.3.3 Interface Controlled Resistance (ICR) 556

19.3.3.1 Electrical Properties of Material Interfaces 557

19.3.3.2 Contact Resistance in a M–S (M–I) Structure 560

19.3.4 Stability of the Minimal Nanoionic State 563

19.4 Energetics of Nanoionic Devices 565

19.4.1 Switching Speed and Energy 565

19.4.2 Heat Dissipation and Transfer in a Minimal Nanoionic Device 567

19.5 Summary 569

Acknowledgment 569

Appendix A Physical Origin of the Barrier Potential 569

References 571

20 Integration Technology and Cell Design 573
Fred Chen, Jun Y. Seok, and Cheol S. Hwang

20.1 Materials 573

20.1.1 Resistance Switching (RS) Materials 573

20.1.1.1 Insulating Oxides 573

20.1.1.2 Semiconducting Oxides 574

20.1.1.3 Electrolyte Chalcogenides 574

20.1.1.4 Phase-Change Materials 575

20.1.2 Electrode Materials, Including Reductants 575

20.2 Structures 576

20.2.1 Planar Stack 576

20.2.2 Sidewall-Conforming Stack 577

20.2.3 Lateral Structure 578

20.3 Integration Architectures 579

20.3.1 Transistor in Series with RRAM (1T1R) 579

20.3.2 Transistor in Parallel with RRAM (T||R) 582

20.3.3 1S1R Stacked Crosspoint 583

20.3.3.1 The Selector Device 583

20.3.3.2 Sensing Margin 584

20.3.3.3 Write Margin 586

20.3.3.4 Cumulative Line Resistance 586

20.3.4 Through-Multilayer via Array 588

20.3.4.1 Through-Multilayer Vias 588

20.3.4.2 Staircase Connections 589

20.3.4.3 Horizontal Electrodes 589

20.3.4.4 Bathtub-Type Peripheral Connection 592

20.3.5 Array Area Efficiency 592

20.4 Conclusions 593

Acknowledgment 594

References 594

21 Reliability Aspects 597
Dirk J.Wouters, Yang-Yin Chen, Andrea Fantini, and Nagarajan Raghavan

21.1 Introduction 597

21.2 Endurance (Cyclability) 598

21.2.1 Endurance Summary of Bipolar Switching TMO RRAM 598

21.2.2 Balancing the Bipolar Switching for Better Endurance 599

21.2.3 Understanding of Endurance Degradation 600

21.3 Retention 601

21.3.1 Retention Summary of Bipolar TMO RRAM 601

21.3.2 Understanding of Retention Degradation in Bipolar TMO RRAM 603

21.3.3 Trade-Off between Retention/Endurance 604

21.4 Variability 605

21.4.1 Introduction 605

21.4.2 Experimental Aspects of Variability 605

21.4.2.1 Variability of Forming Operation 605

21.4.2.2 Intrinsic and Extrinsic Variability 606

21.4.3 Physical Aspects of Variability 607

21.4.3.1 Variability in Unipolar Devices 607

21.4.3.2 Variability in Bipolar Devices 607

21.5 Random Telegraph Noise (RTN) 609

21.5.1 Introduction 609

21.5.2 Charge Carrier Transport-Induced RTN 610

21.5.3 Oxygen Vacancy Transport-Induced RTN 611

21.5.3.1 Experimental Identification of Vacancy Perturbations 611

21.5.3.2 Vacancy-Induced RTN for Shallow to Moderate Reset 612

21.5.3.3 Vacancy-Induced RTN for Very Deep Reset 613

21.5.3.4 Bimodal Filament Configuration and Disturb Immunity 614

21.5.3.5 Role of Dielectric Microstructure on RTN Immunity 614

21.5.4 Summary of RTN Analysis Studies 615

21.6 Disturb 615

21.6.1 Phenomena 615

21.6.2 Understanding and Modeling 616

21.6.3 Anomalous Disturb Behavior 616

21.7 Conclusions and Outlook 617

Acknowledgment 618

References 618

22 Select Device Concepts for Crossbar Arrays 623
Geoffrey W. Burr, Rohit S. Shenoy, and Hyunsang Hwang

22.1 Introduction 623

22.2 Crossbar Array Considerations 624

22.2.1 Problems Associated with Large Subarrays 625

22.2.2 Considerations During NVM-Write 625

22.2.3 Considerations During NVM-Read 627

22.3 Target Specifications for Select Devices 627

22.4 Types of Select Devices 629

22.4.1 Si Based 629

22.4.2 Oxide Diodes 631

22.4.2.1 Oxide PN Junction 631

22.4.2.2 Metal-Oxide Schottky Barrier 632

22.4.3 Threshold Switch 633

22.4.3.1 Ovonic Threshold Switching 634

22.4.3.2 Metal–Insulator Transition (MIT) 636

22.4.3.3 Threshold Vacuum Switch 637

22.4.4 Oxide Tunnel Barrier 638

22.4.4.1 Single Layer Oxide-(Nitride-)Based Select Device (TiO2 and SiNx) 638

22.4.4.2 Multi-Layer Oxide-Based Select Device (TaOx/TiO2/TaOx) 638

22.4.5 Mixed-Ionic-Electronic-Conduction (MIEC) 639

22.5 Self-Selected Resistive Memory 643

22.5.1 Complementary Resistive Switch 645

22.5.2 Hybrid ReRAM-Select Devices 647

22.5.3 Nonlinear ReRAM 649

22.6 Conclusion 651

References 652

23 Bottom-Up Approaches for Resistive Switching Memories 661
Sabina Spiga, Takeshi Yanagida, and Tomoji Kawai

23.1 Introduction 661

23.2 Bottom-Up ReRAM Fabrication Methods 662

23.2.1 Vapor–Liquid–Solid Method 662

23.2.2 Template-Assisted Fabrication Methods of NWs 663

23.3 Resistive Switching in Single (All-Oxide) NW/Nanoisland ReRAM 664

23.3.1 Resistive Switching in Single NiO NWs and Nanoislands 665

23.3.2 Resistive Switching in Oxide NWs Alternative to NiO 669

23.3.3 Study of Switching Mechanisms in Oxide NWReRAM 671

23.3.4 Resistive Switching in NWReRAM with Active Electrodes: ECM Mechanisms 675

23.4 Resistive Switching in Axial Heterostructured NWs 678

23.5 Core–Shell NWs toward Crossbar Architectures 680

23.5.1 Crossbar Devices with Si(core)/a-Si(shell) NWs and Ag Electrodes 681

23.5.2 Crossbar Devices with Ni(core)/NiO(shell) NWs and Ni Electrodes 683

23.6 Emerging Bottom-Up Approaches and Applications 686

23.6.1 1D1R Nanopillar Array 686

23.6.2 Block-Copolymer Self-Assembly for Advanced ReRAM 687

23.7 Conclusions 688

References 689

24 Switch Application in FPGA 695
Toshitsugu Sakamoto, S. SimonWong, and Young Yang Liauw

24.1 Introduction 695

24.2 Monolithically 3D FPGA with BEOL Devices 696

24.3 Resistive Memory Replacing Configuration Memory 698

24.3.1 Architecture 698

24.4 Resistive Configuration Memory Cell 699

24.5 Resistive Configuration Memory Array 700

24.5.1 Prototype 702

24.5.2 Measurement Results 703

24.6 Complementary Atomic Switch Replacing Configuration Switch 706

24.6.1 Complementary Atomic Switch (CAS) 706

24.6.2 Cell Architecture with CAS 707

24.6.3 Demonstration of CAS-Based Programmable Logic 709

24.7 Energy Efficiency of Programmable Logic Accelerator 710

24.8 Conclusion and Outlook 712

References 712

25 ReRAM-Based Neuromorphic Computing 715
Giacomo Indiveri, Eike Linn, and Stefano Ambrogio

25.1 Neuromorphic Systems: Past and Present Approaches 715

25.2 Neuromorphic Engineering 715

25.3 Neuromorphic Computing (The Present) 716

25.4 Neuromorphic ReRAM Approaches (The Future) 718

25.4.1 ReRAM-Based Neuromorphic Approaches 718

25.4.2 Nonvolatility and Volatility of Resistive States 721

25.4.3 Nonlinear Switching Kinetics 722

25.4.4 Multilevel Resistance Behavior 722

25.4.5 Capacitive Properties 725

25.4.6 Switching Statistics 725

25.5 Scaling in Neuromorphic ReRAM Architectures 728

25.6 Applications of Neuromorphic ReRAM Architectures 729

References 731

Index 737

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Author Information

Daniele Ielmini is associate professor in the Department of Electrical Engineering, Information Science and Bioengineering, Politecnico di Milano, Italy. He obtained his Ph.D. in Nuclear Engineering from Politecnico di Milano in 2000. He held visiting positions at Intel and Stanford University in 2006. His research group investigates emerging device technologies, such as phase change memory (PCM) and resistive switching memory (ReRAM) for both memory and computing applications. He has authored six book chapters, more than 200 papers published in international journals and presented at international conferences, and four patents to his name. Professor Ielmini received the Intel Outstanding Research Award in 2013 and the ERC Consolidator Grant in 2014.

Rainer Waser is professor at the faculty for Electrical Engineering and Information Technology at the RWTH Aachen University and director at the Peter Grünberg Institute at the Forschungszentrum Jülich (FZJ), Germany. His research group is focused on fundamental aspects of electronic materials and on such integrated devices as nonvolatile memories, logic devices, sensors and actuators.
Professor Waser has published about 500 technical papers. Since 2003, he has been the coordinator of the research program on nanoelectronic systems within the Germany national research centres in the Helmholtz Association. In 2007, he has been co-founder of the Jülich-Aachen Research Alliance, section Fundamentals of Future Information Technology (JARA-FIT). In 2014, he was awarded the Gottfried Wilhelm Leibniz Prize of the Deutsche Forschungsgemeinschaft and the Tsungming Tu Award of the Ministry of Science and Technology of Taiwan.
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