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DIGITAL INTEGRATED CIRCUITS

TOM DEMASSA, Arizona State University
ZACK CICCONE, VLSI Technology, Inc.
ISBN: 0-471-10805-7, 816 Pages, Cloth, 1996


Description:

The manuscript that I have read rather thoroughly impresses me as a potentially classic text in Digital Integrated Circuits. These are the words of one reviewer who examined the new text by DeMassa and Ciccone. Clear and concise, this book provides the most extensive coverage of digital integrated circuits found in a single source.

The text's emphasis on CMOS gives a detailed description of the most extensively used family of chips. Its sytematic, step-by-step approach and numerous problems and examples contribute to why reviewers praised this text's clarity. The modular table of contents provides more versatility in course structure. Over 50 SPICE simulations help students apply their knowledge with the most universally accepted circuit analysis package.

Tips, tricks, and gimmicks help students avoid common pitfalls. Suitable for a junior/senior/grad level course in Digital (Integrated) Circuits, Bipolar Digital IC's, or MOS/ GASFET Digital IC's taught out of Electrical Engineering or Electronic Technology departments. Required of most Electrical Engineering majors, this course typically follows the Electronics and Digital Logic courses.

Features:

Supplements:

Table of Contents

  1. Properties And Definitions Of Digitalics
  2. Diodes
  3. Bipolar Junction Transistors
  4. Introduction To Bipolar Digital Circuits
  5. Resistor-Transistor Logic (RTL)
  6. Diode-Transistor Logic (DTL)
  7. Transistor-Transistor Logic (TTL)
  8. Schottky Transistor-Transistor Logic (STTL)
  9. Advanced Schottky Transistor-Transistor Logic (ASTTL)
  10. Other TTL Gates
  11. Basic Emitter-Coupled Logic (ECL)
  12. Temperature Compensating Emitter-Coupled Logic
  13. MECL III And ECL 1ook
  14. Modern ECL
  15. Other ECL Gates
  16. Metal Oxidide Semiconductor Field Effect Transistors
  17. Introduction To MOS Digital Circuits
  18. Resistor Loaded NMOS Inverter
  19. Saturated Enhancement-Only Loaded MOS Inverter
  20. Linear Enhancement-Only Loaded NMOS Inverter
  21. Enhancement-Depletion Loaded NMOS Inverter
  22. NMOS Gates
  23. CMOS Inverter
  24. CMOS Combinational Logic Gates
  25. CMOS Tri-State Logic Gates
  26. CMOS Schmitt Trigger Gates
  27. CMOS Drivers
  28. Dynamic CMOS
  29. Comparison And Interfacing Of Logic Families
  30. BICMOS
  31. Latches And Flip-Flops
  32. Semiconductor Read-Only Memories
  33. Semiconductor Static Random-Access Memories
  34. Gallium Arsenide Metal Semiconductor Field Effect Transistors
  35. Direct Coupled Nmesfet Logic Inverter (DCFL)
  36. Schottky Diode Nmesfet Logic (SDFL) Inverter
  37. Buffered Nmesfet Logic (BFL) Inverter
  38. Other Gallium Arsenide Logic Family Inverters
  39. Gallium Arsenide NMESFET Gates

Appendices:

  1. Diode Switching Times
  2. BJT Switching Times


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