This book is composed of 6 chapters from the fundamental concept introduction of the real-time image processing to future perspectives in this area. We describe hardware architectures and different optimization strategies for real-time purpose. The latter consists in a survey of software and hardware co-design tools at different levels. Two real-time applications will be presented in detail in order to illustrate the proposed approaches.
Recently, the real-time image processing field has made a lot of progress. Technology evolution allows engineers to integrate more complex algorithms with large data volume onto embedded systems, and produce series of new sophisticated electronic architectures at an affordable price. At the same time, industrial and academic researchers propose new methods and provide new tools in order to facilitate real-time image processing realization at different levels. It is necessary to perform a deep evaluation of this topic.
We describe hardware architectures and different optimization strategies for real-time purpose. The latter consists of a survey of software and hardware co-design tools at different levels. Two real-time image processing applications will be presented in detail in order to illustrate the proposed approaches. The major originalities of this book include: a). Algorithm Architecture mapping: we select methods and tools which treat each application simultaneously and its electronic platform in order to perform fast and optimal DSE (Design Space Exploration), b). Each approach will be illustrated by concrete examples, and c). Two chosen algorithms consist of recent advances in their domain.
Description of hardware architecture for real-time processing
Optimization strategies for real-time image processing
Application 1: Level set optimization methods for real-time image segmentation
Application 2: Real-time image skin lesion assessment with light-tissue interaction based method
Future perspectives: Hardware implementation of real-time multispectral image processing within heterogeneous architectures?