DescriptionModern, large-scale analog integrated circuits (ICs) are essentially composed of metal-oxide semiconductor (MOS) transistors and their interconnections. As technology scales down to deep sub-micron dimensions and supply voltage decreases to reduce power consumption, these complex analog circuits are even more dependent on the exact behavior of each transistor. High-performance analog circuit design requires a very detailed model of the transistor, describing accurately its static and dynamic behaviors, its noise and matching limitations and its temperature variations. The charge-based EKV (Enz-Krummenacher-Vittoz) MOS transistor model for IC design has been developed to provide a clear understanding of the device properties, without the use of complicated equations. All the static, dynamic, noise, non-quasi-static models are completely described in terms of the inversion charge at the source and at the drain taking advantage of the symmetry of the device. Thanks to its hierarchical structure, the model offers several coherent description levels, from basic hand calculation equations to complete computer simulation model. It is also compact, with a minimum number of process-dependant device parameters.
Written by its developers, this book provides a comprehensive treatment of the EKV charge-based model of the MOS transistor for the design and simulation of low-power analog and RF ICs. Clearly split into three parts, the authors systematically examine:
- the basic long-channel intrinsic charge-based model, including all the fundamental aspects of the EKV MOST model such as the basic large-signal static model, the noise model, and a discussion of temperature effects and matching properties;
- the extended charge-based model, presenting important information for understanding the operation of deep-submicron devices;
- the high-frequency model, setting out a complete MOS transistor model required for designing RF CMOS integrated circuits.
Practising engineers and circuit designers in the semiconductor device and electronics systems industry will find this book a valuable guide to the modelling of MOS transistors for integrated circuits. It is also a useful reference for advanced students in electrical and computer engineering.
List of Symbols.
1.1 The Importance of Device Modeling for IC Design.
1.2 A Short History of the EKV MOST Model.
1.3 The Book Structure.
PART I: THE BASIC LONG-CHANNELINTRINSIC CHARGE-BASED MODEL.
2.1 The N-channel Transistor Structure.
2.2 Definition of charges, current, potential and electric fields.
2.3 Transistor symbol and P-channel transistor.
3. The Basic Charge Model.
3.1 Poisson’s Equation and Gradual Channel Approximation.
3.2 Surface potential as a Function of Gate Voltage.
3.3 Gate Capacitance.
3.4 Charge Sheet Approximation.
3.5 Density of Mobile Inverted Charge.
3.6 Charge-Potential Linearization.
4. Static Drain Current.
4.1 Drain Current Expression.
4.2 Forward and Reverse Current Components.
4.3 Modes of Operation.
4.4 Model of Drain Current Based on Charge Linearization.
4.5 Fundamental Property: Validity and Application.
4.6 Channel Length Modulation.
5. The Small-Signal Model.
5.1 The Static Small-Signal Model.
5.2 A General Non-Quasi-Static Small-Signal Model.
5.3 The Quasi-Static Dynamic Small-Signal Model.
6. The Noise Model.
6.1 Noise Calculation Methods.
6.2 Low-Frequency Channel Thermal Noise.
6.3 Flicker Noise.
Appendix : The Nyquist and Bode Theorems.
Appendix : General Noise Expression.
7. Temperature Effects and Matching.
7.2 Temperature Effects.
PART II: THE EXTENDED CHARGE-BASED MODEL.
8. Non-Ideal Effects Related to the Vertical Dimension.
8.2 Mobility Reduction Due to the Vertical Field.
8.3 Non-Uniform Vertical Doping.
8.4 Polysilicon Depletion.
8.4.1 Definition of the Effect.
8.5 Band Gap Widening.
8.6 Gate Leakage Current.
9. Short-Channel Effects.
9.1 Velocity Saturation.
9.2 Channel Length Modulation.
9.3 Drain Induced Barrier Lowering.
9.4 Short-Channel Thermal Noise Model.
10. The Extrinsic Model.
10.1 Extrinsic Part of the Device.
10.2 Access Resistances.
10.3 Overlap Regions.
10.4 Source and Drain Junctions.
10.5 Extrinsic Noise Sources.
PART III: THE HIGH-FREQUENCY MODEL.
11. Equivalent Circuit at RF.
11.1 RF MOS Transistor Structure and Layout.
11.2 What Changes at RF?.
11.3 Transistor Figures of Merit.
11.4 Equivalent Circuit at RF.
12. The Small-Signal Model at RF.
12.1 The Equivalent Small-Signal Circuit at RF.
12.2 Y-Parameters Analysis.
12.3 The Large-Signal Model at RF.
13. The Noise Model at RF.
13.1 The HF Noise Parameters.
13.2 The High-Frequency Thermal Noise Model.
13.3 HF Noise Parameters of a Common-Source Amplifier.